The importance of Verilog HDL is well known and proven for Hardware descriptions. Module-1 deals with the introduction about Verilog HDL and trends, then briefly elaborates about the top to bottom methodology and vice versa with examples. Module – 2 deals with the different data types involved in the Verilog and basic structure of Verilog HDL. Module -3 deals with the data flow modeling and gate level modeling. Module -4 explains behavioral modeling with more examples. Module -5 deals with some useful modeling techniques and logic synthesis with Verilog.

This book has been written strictly as per the new syllabus of VTU which uses a plain, simple language to enlighten the basic fundamentals. The topics in this book have been organised to ensure a seamless flow of information for a deeper understanding of the concepts. Each module includes numerous examples and exercise solutions to aid students in gaining a better understanding of the subject.