Physical design is the craft of turning a synthesized netlist into a manufacturable chip. This book builds the field from first principles — the partitioning, floorplanning, placement, routing, clock-tree synthesis, and timing-closure algorithms at its core — then assembles them into the modern RTL-to-GDSII flow used to close and tape out a real system-on-chip. Every major technique comes with its problem formulation, pseudocode, and a worked example you can follow by hand. A closing chapter walks the production flow stage by stage — inputs, tools, checks, and the pitfalls a working engineer actually meets. For students, early-career physical-design and STA engineers, and anyone preparing for an implementation or timing interview. Includes 24 original diagrams, worked problem sets, and chapter exercises.